A compact code 16-bit processor for embedded applications

This work proposed an instruction set that achieved small executable codes for embedded applications. The aim of the design is to reduce the size of the executable code while maintaining the execution speed. Rather than applying instruction compression which required complex additional circuits, the approach taken in this work is to design the instruction set for the purpose of compact code. The result from a small set of benchmark illustrated that the static code size can be half of a conventional instruction set while the execution speed is maintained. Key-Words: Compact code, instruction compression, embedded processor.